Global Standards for the Microelectronics Industry
Recently Published Documents
Title | Document # | Date | Details |
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RECOMMENDED ESD-CDM TARGET LEVELS This document was written with the intent to provide information for quality organizations in both semiconductor companies and their customers to assess and make decisions on safe ESD CDM level requirements. |
JEP157A | Apr 2022 | view |
EXTERNAL VISUAL External visual inspection is an examination of the external surfaces, construction, marking, and workmanship of a finished package or component. External visual is a noninvasive and nondestructive test. It is functional for qualification, quality monitoring, and lot acceptance. |
JESD22-B101D | Apr 2022 | view |
DDR5 RDIMM Standard, Annex C This standard, JESD305-R8-RCC, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card C Annex, defines the design detail of x4, 1 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.12. |
JESD305-R8-RCC | Apr 2022 | view |
DDR5 RDIMM Standard, Annex F This standard, JESD305-R4-RCF, DDR5 Registered Dual Inline Memory Module with 4-bit ECC (EC4 RDIMM) Raw Card F Annex, defines the design detail of x4, 1 Package Rank DDR5 RDIMM with 4-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.10. |
JESD305-R4-RCF | Apr 2022 | view |
DDR5 RDIMM Standard Annex E This standard, JESD305-R8-RCE, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card E Annex, defines the design detail of x8, 2 Package Ranks DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.13. |
JESD305-R8-RCE | Apr 2022 | view |
BYTE ADDRESSABLE ENERGY BACKED INTERFACE This standard specifies the host and device interface for a DDR4 NVDIMM-N, which is a DIMM that achieves non-volatility by copying SDRAM contents into non-volatile memory (NVM) when host power is lost using an Energy Source managed by either the module or the host. This standard is used in conjunction with JESD248. Item 2233.54G |
JESD245E | Apr 2022 | view |
DDR5 RDIMM Standard Annex D This standard, JESD305-R8-RCD, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card D Annex, defines the design detail of x8, 1 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.03 |
JESD305-R8-RCD | Apr 2022 | view |
DDR5 RDIMM Standard Annex B This standard, JESD305-R4-RCB, DDR5 Registered Dual Inline Memory Module with 4-bit ECC (EC4 RDIMM) Raw Card B Annex, defines the design detail of x4, 2 Package Ranks DDR5 RDIMM with 4-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.14. |
JESD305-R4-RCB | Apr 2022 | view |
DDR5 RDIMM Standard Annex A Item 2273.16 |
JESD305-R8-RCA | Mar 2022 | view |
METHOD FOR DEVELOPING ACCELERATION MODELS FOR ELECTRONIC DEVICE FAILURE MECHANISMS The method described in this document applies to all reliability mechanisms associated with electronic devices. The purpose of this standard is to provide a reference for developing acceleration models for defect-related and wear-out mechanisms in electronic devices. |
JESD91B | Mar 2022 | view |
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