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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SO-DIMM Design Specification

 MODULE4.20.21.B May 2011

Release No. 21
Item 2182.02

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification

Release Number: 29 		MODULE4.20.28 May 2019

This specification defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Registered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM RDIMMs). These DDR4 Registered DIMMs (RDIMMs) are intended for use as main memory when installed in PCs. Item 2149.05E

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex A, R/C A in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

 MODULE4.20.20.A May 2011

Release No. 21
Item 2082.28B, 2082.69, 2082.78, 2082.90

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex AB, R/C AB in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

 MODULE4.20.20.AB May 2011

Release No. 21
Item 2202.01

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex B, R/C B in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

 MODULE4.20.20.B May 2011

Release No. 21
 Item 2082.29B, 2082.70, 2082.80, 2082.91

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex D, R/C D, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.22B

 MODULE4.20.20.D Feb 2009

Release No. 18

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex D, Raw Card D, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification

Release Number: 30 		MODULE4.20.28.D Aug 2020

This specification defines the electrical and mechanical requirements for Raw Card D, 288-pin, 1.2 Volt (VDD), Registered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM RDIMMs). These DDR4 Registered DIMMs (RDIMMs) are intended for use as main memory when installed in PCs. Item 2149.08c

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex E, R/C E in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

 MODULE4.20.20.E May 2011

Release No. 21
Item 2082.56B, 2082.72, 2082.81, 2082.92

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex E, R/C E, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification

Release Number: 30 		MODULE4.20.28.E Aug 2020

This specification defines the electrical and mechanical requirements for Raw Card E, 288-pin, 1.2 Volt (VDD), Registered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM RDIMMs). These DDR4 Registered DIMMs (RDIMMs) are intended for use as main memory when installed in PCs. Committee Item 2149.34a

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex F, R/C F in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

 MODULE4.20.20.F May 2011

Release No. 21
Item 2082.59, 2082.88

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex G, R/C G, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.24B

 MODULE4.20.20.G Feb 2009

Release No. 18

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex G, R/C G, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification

Release Number: 25 		MODULE4.20.28.G Jun 2015

Item 2241.06B

This specification defines the electrical and mechanical requirements for Raw Card G, 288-pin, 1.2 Volt (VDD), Registered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM RDIMMs). These DDR4 Registered DIMMs (RDIMMs) are intended for use as main memory when installed in PCs.

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex H, R/C H, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.08

 MODULE4.20.20.H Aug 2009

Release No. 19

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex K, R/C K in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification (1Rx8 VLP).

 MODULE4.20.20.K May 2011

Release No. 21.
Item 2145.12A, 2145.30

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex L, R/C L, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2145.13B

 MODULE4.20.20.L Sep 2012

Release No. 22. Item 2145.38

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex M, R/C M, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2145.06A

 MODULE4.20.20.M Feb 2009

Release No. 18

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex N, R/C N, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2145.22

 MODULE4.20.20.N Sep 2012

Release No. 22. Item 2145.35

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex W, R/C W, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.07

 MODULE4.20.20.W Aug 2009

Release No. 19

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Annex Y, R/C Y, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.06

 MODULE4.20.20.Y Aug 2009

Release No. 19

Committee(s): JC-45.1, JC-45

JESD21-C Solid State Memory Documents Main Page

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DEFINITION OF SSTU32865 REGISTERED BUFFER WITH PARITY FOR 2R x 4 DDR2 RDIMM APPLICATIONS

 JESD82-9B.01 Oct 2021

This standard provides the functional definition, ball-out configuration and package outline, signal definitions and input/output characteristics for a 28-bit 1:2 registered driver with parity suitable for use on DDR2 RDIMMs. The SSTU32865 integrates the functional equivalent of two SSTU32864 devices (as defined in JESD82-7) into a single device, thereby easing layout and board design constraints especially on high density RDIMMs such as dual rank, by four configurations. Moreover, the optional use of a parity function is provided for, permitting detection and reporting of parity errors across its 22 data inputs. JESD82-9 specifies a 160-pin Thin-profile, fine-pitch ball-grid array (TFBGA) package. This is a minor editorial revision as shown in Annex A of the document.

Committee(s): JC-40, JC-40.4

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