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The Load Reduced DIMM (LRDIMM) Memory Buffer (MB) supports DDR3 SDRAM main memory. The Memory Buffer allows buffering of memory traffic to support large memory capacities. Unlike DDR3 Register Buffer (SSTE32882), which only buffers Command, Address, Control and Clock, the LRDIMM Memory Buffer also buffers the Data (DQ) interface between the Memory Controller and the DRAM components. The Memory Buffer interface is responsible for memory requests to and from the local DIMM. LRDIMM provides a high memory bandwidth, large capacity channel solution for DDR3 main memory systems. LRDIMM uses commodity DRAMs isolated from the channel behind the Memory Buffer on the DIMM.

Committee(s): JC-40, JC-40.4

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Release No. 24;
Item 2114.44

Committee(s): JC-45, JC-45.3

JESD21-C Solid State Memory Documents Main Page

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Item 11.14-151

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Committee(s): JC-11.14

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Release 23. Item 2114.28

Committee(s): JC-45, JC-45.3

JESD21-C Solid State Memory Documents Main Page

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Release No. 22. Item 2145.35

Committee(s): JC-45, JC-45.1

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This document defines the DDR3 SDRAM standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices. This document was created based on the DDR2 standard (JESD79-2) and some aspects of the DDR standard (JESD79). Each aspect of the changes for DDR3 SDRAM operation were considered and approved by committee ballots). The accumulation of these ballots were then incorporated to prepare this standard (JESD79-3), replacing whole sections and incorporating the changes into Functional Description and Operation. Item 1627.14

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Committee(s): JC-42.3

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Release No. 21
Item 2082.56B, 2082.72, 2082.81, 2082.92

Committee(s): JC-45, JC-45.1

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Release No. 21
 Item 2082.29B, 2082.70, 2082.80, 2082.91

Committee(s): JC-45, JC-45.1

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Release No. 21
Item 2082.28B, 2082.69, 2082.78, 2082.90

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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