Global Standards for the Microelectronics Industry
JC-42 Solid State Memories
The products within JC-42's scope include all memory integrated circuits and programmable logic devices, whether static or dynamic, without regard to their fabrication technology or application. Examples include large static and dynamic RAMs, ROMs, EEPROMs, and PLDs.
Activities include the development of technical information and standards pertaining to pinouts, operational characteristics including reading and writing algorithms, test parameters, characterization, and registration formats.
The committee maintains liaisons with other JEDEC committees and outside organizations to promote wide acceptance of the committee’s actions.
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|GRAPHICS DOUBLE DATA RATE 6 (GDDR6) SGRAM STANDARD||JESD250||Jul 2017|
|STANDARD MANUFACTURERS IDENTIFICATION CODE||JEP106AV||Jul 2017|
|DDR4 SDRAM STANDARD||JESD79-4B||Jun 2017|
|LOW POWER DOUBLE DATA RATE 4 (LPDDR4)||JESD209-4B||Mar 2017|
|Addendum No. 1 to JESD79-4, 3D Stacked DRAM||JESD79-4-1||Feb 2017|
|Annex A: Differences between JESD21C Release 26 and its predecessor JESD21C, Release 26.||AnnexA - JESD21C||Jan 2017|
|NAND FLASH INTERFACE INTEROPERABILITY||JESD230C||Nov 2016|
|GRAPHICS DOUBLE DATA RATE (GDDR5X) SGRAM STANDARD||JESD232A||Aug 2016|
|JC-42.6 MANUFACTURER IDENTIFICATION (ID) CODE FOR LOW POWER MEMORIES||JEP166B||Feb 2016|
|GRAPHICS DOUBLE DATA RATE (GDDR5) SGRAM STANDARD||JESD212C||Feb 2016|