Global Standards for the Microelectronics Industry
Main Memory: DDR4 & DDR5 SDRAM
Semiconductor memory plays an essential role in the development of countless electronic devices ranging from computers and gaming consoles to televisions and telecommunications products. JEDEC standards encompass virtually every key standard for semiconductor memory in the market today.
JEDEC DDR5
JEDEC published its widely-anticipated JESD79-5 DDR5 SDRAM standard in July 2020, and a second update, JESD79-5B, in August 2022. The standard addresses demand requirements being driven by intensive cloud and enterprise data center applications, providing developers with twice the performance and much improved power efficiency. JESD79-5B DDR5 is available for download from the JEDEC website. Read more about the DDR5 standard here.
JEDEC DDR4
First published in September 2012 and most recently updated in January 2020, the JEDEC DDR4 standard has been defined to provide higher performance, with improved reliability and reduced power, thereby representing a significant achievement relative to previous DRAM memory technologies. DDR4 (JESD79-4C) is available for download from the JEDEC website.
JC-42 Committee
Looking towards the future, JEDEC's JC-42 Committee for Solid State Memories stands at the forefront of the ongoing effort to produce next generation memory device standards. As with all JEDEC standards development activities, industry participation is welcome. Learn more about membership and join today.
Search by Keyword or Document Number
Recent Documents
| Graphics Double Data Rate (GDDR6) SGRAM Standard | JESD250D | May 2023 |
| DDR5 Clock Driver Definition (DDR5CK01) | JESD82-531 | May 2023 |
| DDR4 NVDIMM-N Design Standard | JESD248A.01 | Apr 2023 |
| PMIC50x0 Power Management IC Standard | JESD301-1A.02 Rev. 1.8.5 | Apr 2023 |
| Graphics Double Data (GDDR4) SGRAM Standard | SDRAM3.11.5.8 R16.01 | Mar 2023 |
| Definition of the SSTUB32869 Registered Buffer with Parity for DDR2 RDIMM Applications | JESD82-27.01 | Mar 2023 |
| Fully Buffered DIMM Design for Test, Design for Validation (DFx) | JESD82-28A.01 | Mar 2023 |
| SILICON RECTIFIER DIODES: | JESD282B.02 | Mar 2023 |
| DEFINITION OF THE SSTVN16859 2.5-2.6 V 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR PC1600, PC2100, PC2700 AND PC3200 DDR DIMM APPLICATIONS | JESD82-13A.01 | Mar 2023 |
| GRAPHICS DOUBLE DATA RATE (GDDR5X) SGRAM STANDARD | JESD232A.01 | Mar 2023 |
Events and Meetings
| JC-16,40,42,45,63,64 | Jeju | 5 - 8 Jun 2023 |
| JC-16,40,42,45,63,64 | Vancouver | 28 - 31 Aug 2023 |
| JC-16,40,42,45,63,64 | Maui | 4 - 7 Dec 2023 |
| JC-16,40,42,45,63,64 Committees | Lisbon | 3 - 7 Mar 2024 |
| JC-16,40,42,45,63,64 Committees | Denver | 3 - 6 Jun 2024 |
